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Browse: Home / 2011 / November / Dawn of Energy Efficient High Performance Computing at SC11

Dawn of Energy Efficient High Performance Computing at SC11

By Andrew Sloss on 10/11/2011

This blog was originally posted by the author on http://blogs.arm.com/software-enablement/610-dawn-of-energy-efficient-high-performance-computing-at-sc11/

I’ve been attending Supercomputer Conferences (SC) since 2005. Supercomputers are more commonly called High Performance Computers or just HPC. HPCs, by design, stretch the boundaries of hardware and software technologies. Each generation attempts to attain the next big thing in performance in order to better understand and solve very complex scientific, medical, engineering, and environmental challenges (to name but a few) that would otherwise not be possible. The performance level for the current generation of high-end HPC computers is called Petascale 1015 FLOPS and the next generation performance level is called Exascale 1018 FLOPS.

Exascale will have a new burden of having to operate within a strict power budget. Taking today’s technologies as an extreme example, it can be seen that instead of requiring one power station per Petascale HPC, there is going to be two power stations required per Exascale HPC – this is obviously impractical.

The HPC industry has moved from being proud of the Megawatts of consumption, to adding “green” in the name. At SC2005/Seattle-Washington, I walked around the booths to talk with people and when I mentioned the notion of low power, I received blank stares. In 2005, there was no compelling need to drive these clever companies to look at the issue of power-consumption. However by SC2008/Austin-Texas, there appeared to be a realization of the issue, I suddenly saw “green” appearing at the conference. This is the same conference, which I mark as the rise of the GPGPU that threw heterogeneous computing and energy-efficiency into the limelight for HPC’s.

Last year ARM announced the collaboration on Eurocloud. Eurocloud’s goal “is to scale the platform to support hundreds cores in a single server and show the path that will make a data centre featuring 1 million cores viable. At the heart of this program is the efficient coupling of high performance ARM®CortexTM processors with 3D memory technology…”. This week saw two exciting announcements: 1. ARMs 64-bit Architecture being formally released as ARMv8; and 2. AppliedMicro’s 64-bit ARM implementation targeting extreme high performance. It is easy to create a high performance processor; the trick is to produce the highest performance at the lowest possible power-consumption.

In November at SC2011/Seattle-Washington Energy Efficiency comes of age. ARM is sponsoring and supporting a Birds-of-a-Feather (BOF) to help promote Energy Efficient HPC’s. The BOF aims to encourage researchers and software developers to use “A new, open community website for Energy Efficient HPC based on embedded processors”. Please check out the BOF and join us in Seattle on Tuesday November 15th at 12:15PM!

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